Conventional semiconductor devices typically are made up of a semiconductor substrate, normally a monocrystalline silicon with a plurality of dielectric and conductive layers formed thereon. An integrated circuit is formed of semiconductor devices connected by a plurality of spaced-apart conductive lines and a plurality of interconnection lines, such as bus lines, word lines and logic interconnection lines. Such interconnection lines generally constitute a limiting factor in terms of various functional characteristics of the integrated circuit. There exists a need to provide a reliable interconnection structure capable of achieving higher operating speeds, improved signal-to-noise ratio, improved wear characteristics, and improved reliability.
Most interconnection lines are made of aluminum or an aluminum-base alloy. The performance of a semiconductor device could be improved by forming the interconnection line of a metal having a higher conductivity than aluminum, thereby increasing current handling capability. It is known that copper, copper-base alloys, gold, gold-base alloys, silver and silver-base alloys generally exhibit a higher conductivity than aluminum and aluminum-base alloys, but each has its own drawbacks. One drawback of using copper, for example, is that copper readily diffuses through silicon dioxide, the typical dielectric material employed in the manufacture of semiconductor devices. Moreover, a low cost satisfactory method for etching copper has yet to be developed.
One method of forming copper interconnection lines is by using a "damascene" technique. Damascene is an art which has been employed for centuries in the fabrication of jewelry, and has recently been adapted for application in the semiconductor industry. Damascene basically involves the formation of a trench or a channel opening that is filled with a metal to form a channel. The traditional etch back technique of providing an interconnection structure involves depositing a metal layer, forming a conductive pattern with interwiring spacings, and filling the interwiring spacings with dielectric material. Thus, damascene differs from the traditional etch back technique by forming a pattern of openings in a dielectric layer, which openings are filled in with metal to form a conductive pattern followed by planarization.
In a "dual damascene" technique, two channels of conductive materials are positioned in vertically separate planes perpendicular to each other and interconnected by a vertical "via" at the closest point.
According to conventional practices, a plurality of conductive layers are formed over a semiconductor substrate, and the uppermost conductive layer joined to a bonding pad for forming an external electrical connection. In copper interconnection process, conductive layers would be formed by either damascene or dual damascene techniques. The uppermost conductive layer of the integrated circuit which is to be connected to the chip carrier is typically referred to as the wire bonding layer. The wire bonding layer has bonding pads which are used to make external connections by means of electrically conductive wires and external connection electrodes.
The most commonly used materials for the wire bonding layer are aluminum or aluminum-base alloys, such as aluminum with 2% copper. During the wire bonding process, the semiconductor device would be heated to above 200.degree. C. A bonding tool coupled to a bonding machine would connect the bonding pads with external connection electrodes using electrically conductive wires. The electrically conductive wires are bonded to the bonding pads by the bonding tool using ultrasonic and thermal energies.
Copper or copper-base alloys are not used as wire bonding layers because copper or copper-base alloys tend to oxidize readily at temperature above 200.degree. C. Once oxidized, the bonding pads would not be suitable for wire bonding. Therefore, even though the semiconductor industry is moving towards using copper as the material for interconnection lines, aluminum or aluminum-base alloys continue to be used as the materials for bonding pads.
A suitable conductive barrier layer is needed between the aluminum, or aluminum-base alloy, bonding pads and the underlying copper interconnection lines. Such a barrier layer can be conveniently formed by employing a material that is substantially impervious to the diffusion of aluminum atoms therethrough into the copper interconnection lines and to the diffusion of copper atoms therethrough into the aluminum or aluminum-base alloy bonding pads.
It is well known that titanium nitride (TiN) is a suitable conductive barrier material for aluminum, aluminum-base alloys, and copper. However, in copper interconnection processes, conventional tantalum nitride (TaN) is the most commonly used conductive barrier material. Besides TaN, tantalum silicon nitride (TaSiN) can also be used as a conductive barrier material for copper interconnection processes. The use of TiN would require additional deposition chambers because the deposition of TiN and TaN cannot be performed using the same deposition chamber. The need for additional deposition chambers for TiN deposition undesirably increases the cost and process complexity for the production of semiconductor devices.
Conventional TaN typically contains a nitrogen content by atomic weight of 20%. However, aluminum atoms from aluminum or aluminum-base alloys diffuse readily through conventional TaN, making it unsuitable for use as a conductive barrier layer between aluminum or aluminum-base alloys and copper interconnection lines. A method to form improved TaN layers that can be used as conductive barrier layers between aluminum or aluminum-base alloys and copper interconnection lines has long been sought but has eluded those skilled in the art.